⭐天璇 Merak⭐大球系VTUBER @merak0325.bsky.social 在夜空中默默注視著大家的一顆恆星，因想要分享自己喜歡的事物而成為了vtuber；圍棋、程式設計、數位IC設計、鋼琴、作曲編曲、天文、Tetris都是我的興趣！
個人網頁 - https://merak0325.github.io
X - https://x.com/MerakChannel
阿力固的斯 @aligu.bsky.social 
nv-h @nv-h.bsky.social 組み込みソフトウェア(nRF52とかESP32)
ZynqとかFPGAも好き。VHDLに染まってる。
半導体屋→無線機屋→重工屋→IoT屋
虫ｽｷ
最近植物もｽｷ
※今は主に https://x.com/saido_nv にいるはず
Phil Dubious @garzol.bsky.social VHDL addict.
ヘルメット(すみ) @helmet-sumi.bsky.social 本職は組み込みエンジニアです。(C言語、VHDL)
半導体業界の末端で闇の装置を
作っています。
趣味で絵を描きます。
フォロー、リポスト、いいね誠に
ありがとうございます。
※無断利用禁止(転載、AI等)
https://potofu.me/helmet-sumi
金澤重則 @friedemann1710.bsky.social 駒込界隈を漂泊中の楽器バカ。音楽イベント「ピタゴラスの罠」主催。いちおう、ハードウェア系エンジニア。最近はVHDLとかVerilogとか書いてお給料貰ってます。今夜もきっと、何処かの飲み屋で。
Tedious Soapbox @lichaat.bsky.social #FPGA | #ASIC | #RISC-V | #Verilog | #RoaLogic
Sushant Mondal @sushantmondal.com A bad computer architect, nothing else! SystemVerilog and Python are two of my favorite languages for making and testing my own hardware.
More 'bout me: https://www.sushantmondal.com/
FPGA WARRIOR ( ✯ ) @fpgawarrior.bsky.social ✯ Ingeniero. Ni vendedor de humo, ni explotador de otros. Sólo un trabajador especializado. (C/C++ | VHDL | Verilog | SystemVerilog | Labview)
https://x.com/FpgaWarrior | https://fpgawarrior.substack.com/ | https://darkryoga.wordpress.com
Mark A. @markaza.bsky.social Business Development for HPC, Former ASIC designer and verification.
@h4ckr-zhf.bsky.social @h4ckr-zhf.bsky.social Magic enjoyer
AMS IC designer- T Tom @thomas-glanz.bsky.social IC electronics designer; EV and green energy enthusiast; my thoughts are based on the laws of physics
Alex Graham @finalcookie.bsky.social "Dedicated here to the unfinished work."
IC Layout Designer, mini painter, photo taker, hopeless political junkie. He/Him, Transit, Housing and Liberalism booster.
John Hayden ❌👑🌊 @jhayden.bsky.social John Hayden. So many hobbies, so little time. Smite incandescent metal; make music, art, and beautiful things. Boston Grampa; retired IC designer.
Be safe, be kind.
He/him
Guns2gardens.org
Ty Garibay @tygaribay.bsky.social Chip designer, home cook, sports fan, any reader 
Matt Genovese @mgenovese.bsky.social Research + Requirements + UX/UI Software Design | MSEE, former Chip Designer | Talk shop with anyone [NY / TX / BRAZIL]
https://planorama.design/matt
David Mc Carthy @davidehmcee.bsky.social Chip designer. Academic currently in industry. He/him. Interested in vintage computers, mostly 90s RISC/unix stuff. Also interested in bridge (the card game) and video games.
Niladry Sen @niladrysen.bsky.social Postgraduate student (VLSI Design) at IIEST SHIBPUR. Interested in Quantum Computing, Compilation, QML, QECC
Gurkan Gunes @gguness.bsky.social IC Design Engineer
Colin Kilburn @ckilburn.bsky.social Automotive | Watches | Fashion | PC Hardware | Gaming | Eagles, Red Sox, Celtics Fan | Physical Design Engineer | RPI Alum | Opinions are my own
Brenda Taiwan @williams569345.bsky.social Best Female Cloud Miner of Cryptocurrency, Frontend Developer, ASIC Engineer. Always take risk, Fear is just a term.
Kenby @solartangerine.bsky.social ASIC Engineer
Storm Dew (SD) @stormdew.com Principal ASIC/SoC Engineer, VLSI Professional, Responsible AI Advocate, Imagineer, Explorer, Interactive Entertainment Hobbyist, Tech Savvy, Dreamweaver and more
Dio Huang @dio-transletum.bsky.social Digital IC design engineer | Powerlifter | Bodybuilder | Kendo | Iaido | Muay Thai 
NortWind @nortwind.bsky.social I'm a retired digital design engineer. Gamer. Rock collector. Recently started watching anime.
MarMar Bloo Hoosk @marmarhusky.bsky.social Bloo Hoosk | 24M | Bi | Fursuiter | Tech Enthusiast | Digital Design Engineer | Bruh | Shaving Police | Taken (open) by @BropixWuff
Xiao Wang @xiaowang1984.bsky.social Principal Engineer Semiconductor Industry and now a DER/Grid Edge worker as well! Opinions own
French consul @fconsul.bsky.social Semiconductor technology expert
Kenta Ida @fugafuga.bsky.social 趣味はプログラミングと電子工作．Vivadoぽちぽちまん．GOWIN FPGAで遊んでます。
Woozle @woozle64.bsky.social FPGA/hardware engineer, Designed the Consolizer.
Tom Forsyth @tomforsyth.bsky.social Gfx coder and chip designer. He/him/3Dlabs/Muckyfoot/RAD/Valve/Oculus/Intel/Rec Room/Riot.
mastodon.gamedev.place/web/@TomF
yukikaze @yukika2e.bsky.social 組み込みソフトウェアエンジニア。 ASIC/FPGAわかる人でしたが今はソフトウェアのみです。使える言語はC/C++。同じ業界の方フォローさせて頂いてます。趣味はカメラ(α6700)/自作PC/FPS 発言は個人の見解であり、所属する組織のものではありません。DMは返信していません。
Gareth Edwards @garethedwards.bsky.social GarethDEdwards on the other place. Music, gliding, ASIC design and other electronics nonsense. 
Ken SAKUMA @ken-sakuma.bsky.social ミリ波、ASIC、VHDL、組込。光デバイス、無機材料、数値解析。社内サーバ管理 FreeBSD & Ubuntu など。Ph.D.、一陸技、他。
Batsi @batsi.bsky.social ASIC designer. Mathematical chef. Guitar manipulator. Internet superhero. Mentally ill.
とりちゃん @torichan65535.bsky.social 某JTCの組込屋。いまはアプリ屋とエセ企画屋。ASIC/FPGA。Python。C/C++。たまにHackTheBox🐭。TryHackMeはそこそこ履修。
Ge9r0e.Z@避難垢 @ge9r0ez.bsky.social VLSIデザイナー:僕の体の70%はVTUBERと車でできている- H Harish Kumaran @harishkumaran.bsky.social A 2nd year ECE Student interested in VLSI domain
Geomon Joshy @geomonjoshy.bsky.social Master of science in electronics student interested in Quantum Computing, Electronics, RF Electronics , VLSI.
qxy @qwertxzy.me Digital Design Engineer / Motorcycle Enthusiast / Houseplant Fan
John Wickerson @wicko3.bsky.social Senior Lecturer at Imperial College EEE researching programming languages and hardware design.
CDemerjian @cdemerjian.bsky.social Charlie Demerjian, writer for SemiAccurate and follower of tech. If you are reading this, it is really me, and yes, it is killing me to write a non-snarky profile. *SOB*
아리다 남편 @parkbot.bsky.social Burrito scientist, AMD Infinity Fabric performance/architecture. An Olympic medalist once liked a picture of my dog pooping.
📍British Columbia
https://linktr.ee/philpark
Yaman Umuroğlu @maltanar.bsky.social Full stack engineer of a different kind - FPGA compilers, quantized deep learning. 🏳️🌈🇨🇾🇹🇷 in 🇳🇴. Cat dad and freediver.
Michiel van Setten @mjvansetten.bsky.social principal scientist at imec
first principles research on semiconductors
father, husband, bassoonist, aikidoka, equestrian
Job Tijhuis @tijhuis.bsky.social FPGA enthousiast. Likes to dabble in politics sometimes. Is not afraid to state his opinion always.
Nick Brown @nickbrown-hpc.bsky.social Senior Research Fellow @epcc.bsky.social, University of Edinburgh. Interested in novel architectures, HPC, FPGAs, RISC-V, programming language design and LLVM & MLIR.
Prof. Dr. Christoph Studer @profstuder.bsky.social Professor at ETH Zurich: https://ethz.ch/en.html
Chair of Integrated Information Processing (IIP): https://iip.ethz.ch/
Head of the Integrated Systems Laboratory (IIS): https://iis.ee.ethz.ch
Director of SwissChips: https://swisschips.ethz.ch
Peter Claydon @peterclaydon.bsky.social Posting about semiconductors and wireless technology (5G), London pubs and anything that I find interesting. CEO of RANsemi, but views expressed are my own. 
Anthony Donlon @anthonydonlon.bsky.social EE / CS Engineer ## ≡ᗤ- / Digital IC / FPGA / MCU + SystemVerilog / C++ / C ## Enthusiast of computer hardware but also interested in everything ## See Also: https://github.com/donlon
Icepi Zero Bot @icepi-zero-bot.at.wafrn.jcm.re
Send me asks with valid VHDL, SystemVerilog, Amaranth, Spade, or Veryl code and I will execute it for you on a real FPGA!
You[...]
View full profile at https://wafrn.jcm.re/blog/icepi-zero-bot
marimo@技術書典17 い11 @marimo-math.bsky.social 技術同人誌を作っています。
楽しい工学生活を送る会
Python / C++ / VHDL / SystemVerilog / 最適化理論 / 数理最適化 / 最適設計 / 競馬 / Typst
Moppu @moppu.mastodon.ie.ap.brid.gy Prisoner to discrepancies in SystemVerilog feature support | 💖@sylvie | pfp by @sylvie
[bridged from https://mastodon.ie/@moppu on the fediverse by https://fed.brid.gy/ ]
Sean Little @sean-little.bsky.social Professional FPGA developer, mostly in SystemVerilog. I also write Python, MATLAB and C code. I'm interested in the state of this industry.
mshr-h @mshr-h.com Creator and maintainer of Verilog-HDL/SystemVerilog for VS Code extension. Machine learning compiler researcher, contributor to Apache TVM/Hummingbird, rock climbing enthusiast.
https://github.com/mshr-h
Twitter @mshrh3
Catherine @whitequark.org sorceress
Rad No Mad 🌌🖤 @itsradnomad.bsky.social Psychedelic DJ wizard, electronic musician, crochet enthusiast
VTuber | Lvl 33 🔞 | any/all | 🌌🖤
Everything lovingly made w/o GenAI
Banner by @glowthetiefling.bsky.social
https://itsradnomad.carrd.co/
Simon Bisson @sbisson.com 👨💻 Used to write code, now writes words about code 📘 Azure AI Services At Scale🦎O'Reilly 💻 Beats: enterprise, dev, cloud 🙋♂️ Vrai Jerri, bird photos, SFF writer, reader, ally, he/him/they 🐈⬛ calico floofs 📧 simon@sandm.co.uk 🌍 sbisson.com
Emily Allura @eventualgoth.bsky.social Professionally confused. QA Lead on @staroath.bsky.social🏳️⚧️ she/her 🏳️⚧️ Help me pay for my transition http://gofund.me/ed2ab994
Banner from https://nebuleeart.tumblr.com/
Dr. Charles R. Severance (Dr. Chuck) @dr-chuck.bsky.social Professor, open source, EdTech, OER, MOOCs. Python for Everybody - the most popular programming course in the world.
Stefan Abi-Karam @stefanabikaram.com Graduate Student (@SharcLab) + Research Faculty at @GeorgiaTech 🐝
Working on digital hardware design + AI
https://stefanabikaram.com/
LuisJustLuis @playerntfoundg.bsky.social 23 years old // he/him // Computer Engineering Student // Challenged 24/7
Leaf Dubois @leafdubois.com 🏳️🌈🦊 ✧ old-timey furry artist ✧ raccoony.com comic creator ✧ NSFW 🔞 ✧ multidisciplinary nerd ✧ http://leafdubois.com
TG channel: t.me/LeafsArt
hforsten @hforsten.com Electrical engineer. RF electronics, IC design, radars, FPGA, programming. hforsten.com
João Geada @thejackfrost.bsky.social Worked in most fields of Electronic Design Automation, sailor in my spare time, and have enough hobbies and interests to last me more than one lifetime :-) 
Joe @joe-not2b.bsky.social I'm an aging tech nerd, avid hiker, a volunteer park docent, and geocacher. I recently retired after more than three decades working in electronic design automation.
I'm also on Mastodon at @sfba.social@not2b .
渡邉博之(魯) @litulon.bsky.social 場末の半導体論理設計屋- M Kal @mkal.bsky.social Chips: ASIC, FPGA. CV/ML. Duck pictures by the lake. Some bread making. He/They
Claire Xen 🏳️⚧️ 🧙🏻♀️ 💖💛💙 @clairexen.bsky.social Neurodiverse Trans Geek Girl 🧙♀️
Queer Kinky Poly Mess 🏳️🌈 🏳️⚧️
CTO @YosysHQ 😺 RISC-V, SMT 👩💻
Opinions are my Ceti eel's 😛
ACAB BLM ✊ I am Antifa 🏴🚩
Vienna, Austria 📌 she/her 🧚♀️
Ben Reynwar @benreynwar.bsky.social FPGA/ASIC Digital Designer
Wenting @wenting.bsky.social Engineer /🍁🦌/🍄⚖️
Charles Eric LaForest, PhD @handle.invalid FPGA Design Engineer. (he/him)
Working to improve the state of digital logic design.
https://fpgacpu.ca/fpga/index.html
( INACTIVE. PLEASE EMAIL: eric@fpgacpu.ca )
Eugene O'Rourke @ejsorourke.bsky.social #neural #FPGA #inniskeen #astronomy #semiconductor #physics #asic #vlsi #radio #sdr ⏦⎓⎎⎍⏚
🔭 📻 🛰 📡 🪐 🖖 ⛵️🧠
RT ≠ endorsement - My opinions, not my employer's.
Manuel Monge @manuelmonge85.bsky.social Dad, Husband, Researcher, IC Designer
Views are my own
manuelmonge.site
Ken Shirriff @righto.com Computer history. Reverse-engineering old chips. Restored Apollo Guidance Computer, Alto. Ex-Google, Sun, Msft. So-called boffin.
Igmar Palsenberg @igmar.bsky.social IT guy. Does retro and verilog. Not a nice guy.
Daniel Payne @daniel-j-payne.bsky.social Christian, EDA consultant, cyclist, classical music lover
Patrick G. @neuzelaar.bsky.social Silicon Valley. My EV is Musk-free.- G 島蔦 ディーゼル @gr-o.bsky.social Xは破綻する。果たして此処が適地か否か。
結論。地球サイドの完全勝利です。
仕事は集積回路関連
孤独を愛する
Oー神様よーアーメン(其方に機会をやろう...
スヤァoO(・-・)
わったー @disk09.bsky.social どこかの大学院の電電学生M1 / 半導体デバイスと集積回路に関する研究室に居ます
Mainly in Japanese
Paul Campbell @moonbaseotago.bsky.social Bits bytes chips and stuff
Ōtepoti/Aotearoa
https://moonbaseotago.github.io/
Have A SPU-ky Halloween, Everyone @okonomiyonda.bsky.social 一所懸命HW設計者のふりをやっとる現代のC++が大嫌いなSWの開発者。FPGAのGPUと家庭用ゲーム機の設計、うちの猫(ニュートリノ+コスモス)、百人一首、競技かるた、お箏の演奏、ゲーム開発、抹茶＋和菓子
投稿は私個人の意見で、会社を代表するものやない
https://fpga.maisonikkoku.com
Megumin Maniac @meguminmaniac.bsky.social https://www.tumblr.com/meguminmaniac
Rohan makes ASICs 🛠️ @rohan-devarc.bsky.social Exploring the ASIC lore.
Author of /get in losers we're building an ASIC/
Jim Rorie, PhD @jfrorie.bsky.social Computer engineer (PHD-EE), background in ASIC design, signal processing and bioinformatics. Currently a FinTech dev in the financial sector.
Joseph @josephstgeorge.bsky.social ASIC Design Engineer. "You can never know everything, and part of what you know is always wrong. Perhaps even the most important part. A portion of wisdom lies in knowing that. A portion of courage lies in going on anyways."
Chris @geekmom57.bsky.social Engineer, ASIC design and verification, BTS. I know who I am. I know what I want. OT7
Greg @gregdavill.bsky.social Electronics engineer. RISC-V ASICs at IQonIC Works 🧙♂️ (He/Him)
I also take macro photos of electronics
David Dube @ddube.bsky.social Interests in engineering and development. Often escape to the outdoors. Former PM and ASIC Engineer.
Sr. Manager Engineering @Cisco
📍Boulder, CO
JimD @deadbeefjim.bsky.social Retired: software engineer, ASIC engineer and Fire Division Chief. I do lots of different things for projects, but mainly I post pix of cats…
alexh @a1exh.bsky.social ASIC engineer and retro gaming enthusiast. Creator of Thalion Webshrine
http://thalion.atari.org
Pratham @prath-a-m.bsky.social Silicon Design Engineer @ AMD
TECH | AUTOMOTIVE | AVIATION
Ron Cline @roncline33.bsky.social 50 Years of Moore's Law
-- Retired from bleeding edge silicon design.
Joe ❌👑 @not2b.sfba.social.ap.brid.gy (he/him) Aging tech nerd, living in Silicon Valley. I'm an avid hiker and geocacher.
I've recently retired after 30+ years working in electronic design automation. After […]
🌉 bridged from ⁂ https://sfba.social/@not2b, follow @ap.brid.gy to interact
Justin Time @johncenabs.bsky.social ASIC, Silicon design and Machine Learning
Never wrestle with pigs. You both get dirty and the pig likes it - George Bernard Shaw
Deus ex Silicium @dexsilicium.bsky.social Micro-électronique / Semi-conducteurs / Microscopie électronique / Scanner rayons X / Ingénierie inverse hardware / Ondes électromagnétiques / Science / Youtube
youtube.com/dexsilicium
𝚖𝚊𝚡 𝚋𝚊𝚔𝚎𝚛 @maxslug.bsky.social Systems and Systems-on-Chip (SoC) Architect. Views are my own.
I also am the original author of Netdisco and ran nikonhacker.com.
Check out my Semiconductor Industry feed: https://bsky.app/profile/did:plc:vw4jopm4ffmt6qzdh2u66sfd/feed/aaabjlnxaik6c
Oğuz Meteer @oguzmeteer.bsky.social Digital ASIC designer | PhD candidate @UTwente
| Writer at the BitLog technology blog | #FPGA and #ASIC connoisseur | Mastodon: @ometeer@mastodon.social | Twitch: http://twitch.tv/286tech